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Description
The LHCb has requested a second detector upgrade for LHC LS4 (2033-34) to further intensify the operational luminosity and collect up to $300fb^-1$ of additional data. The expected occupancy and radiation levels largely exceed the capabilities of the current ECAL design, which already had planned the replacement of the most inner section during the UpgradeIb detector consolidation taking place at LHC LS3 (2026-2028). Extensive R&D has been carried out since 2018 to develop suitable calorimeter modules for the new PicoCal calorimeter to installed in LHCb UpgradeII, but the collaboration already has the intent of including them at the UpgradeIb detector consolidation phase. A new analog readout ASIC in TSMC 65nm CMOS technology has been proposed to perform the energy integration measurement of these new modules. Despite following a similar processing strategy as its predecessor, the limited supply voltage of the selected technology, which intrinsically provides the required radiation hardness, entails great challenges to the analog design in terms of noise and dynamic range. An additional COTS-based stage is also considered to condition the signal coming from the photo-sensors, connected through a long (up to $20m$) analog link with the readout electronics. This circuit will have to counteract the effects of these long cables and preserve enough SNR to allow for the intended time measurement with a resolution in the $10ps$ range.
