Speaker
Description
To handle the throughput required for the Phase-2 L1T, the detector electronics must be improved using cutting-edge technology such as high bandwidth optical data transfer. Additionally, new electronics with deeper buffering and faster processing are required to meet the increased standards for data gathering in terms of latency.
The overlap muon track finder (OMTF) allows to reconstruct muon trajectories in the transition region between CMS barrel and endcaps by measuring how good the detected hits match the average track of the muon with certain transverse momentum.
The OMTF algorithm implementation for the Phase-2 upgrade is being adapted to the new firmware in order to add new hit information to the transmitted data, and to improve the resource use and the overall latency inside the chip. This study proposes the use of High-Level Synthesis (HLS) as a method to factorize and optimize the original OMTF code and its following implementation in a custom-board FPGA.
| Which session do you think it fits best? | High-speed electronic devices (FPGAs, GPUs, optics) |
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