XXXVI Reunión Bienal de la Real Sociedad Española de Física

Quantum computing with silicon transistors

20 Jul 2017, 10:40

20m

Aula Magna (Santiago de Compostela, Facultade de Química)

Quantum Materials and Technologies (GEFES) Plenary IV-A

Description

Introduction The silicon metal-oxide-semiconductor transistor is the workhorse of the microelectronics industry. It is the building block of all major electronic information processing components such as microprocessors, memory chips and telecommunications microcircuits. By shrinking its size generation after generation the computational performance, memory capacity and information processing speed has increased relentlessly. However, the process of miniaturization is bound to reach its fundamental physical limits in the next decades. New computing paradigms are hence paramount to overcome the technical limitations of silicon technology and continue increasing the computation performance beyond simple multi-core approaches. Quantum computing – based on computing with interacting two-level quantum systems or qubits- offers exponential speed-up over several classical algorithms [1-3] and it is hence one of the most sought-after alternatives to conventional computing. However, finding the optimal physical system to process quantum information and scale it up to the large number of qubits necessary to run the aforementioned algorithms remains a major challenge. Paradoxically, we are now starting to see that silicon technology itself could offer an optimal platform on which to fabricate spin-based scalable quantum circuits: Quantum computing with silicon transistors fully profits from the most established industrial technology to fabricate large scale integrated circuits while facilitating the integration with conventional electronics for fast data processing of the binary outputs of the quantum processor; all this offering long electron spin coherence times [4]. Results In this talk, we present a series of results on fully depleted silicon-on-insulator (FD-SOI) transistors at miliKelvin temperatures that demonstrate this technology can provide a platform for high-integration spin qubit architectures. Firstly, we report the formation of a tunnel coupled double quantum dot (DQD) at the top-most edges of the transistor, as the building block for implementing charge and spin qubits [5,6]. By using split-gate electrodes we independently control the charge occupation of the system down to the few-electron limit. Measurements of the charge and spin state of the system are done via in-situ dispersive gate-based radio-frequency reflectometry [7-9], see Fig 1. This technique, that interfaces the quantum system to a high-frequency electrical resonator, removes the need for external charge sensors and provides a compact and sensitive way (δq=37 µe/√Hz) to detect charge motion, favouring the prospects for scalability. Furthermore, we show coherent control the charge occupancy of the DQD in the single-electron regime using microwave excitation. We perform Landau-Zener-Stückelberg interferometry experiments to assess the charge coherence time of the system, T2*=250 ps [10]. Finally, we present a set of experiments that demonstrate the potential to scale FD-SOI technology to a large number of qubits and interface them naturally with conventional binary FD-SOI transistors: We present a quadruple-gate transistor on FD-SOI that can be reconfigured to host up to four quantum dots in silicon [11] showing that this approach can be readily extended to fabricate a 1D line of interacting qubits. Furthermore, we show a monolithic approach to fabricate hybrid classical-quantum circuits in which the qubit readout is controlled by the digital state of the conventional transistor, demonstrating the first steps towards time-based multiplexing qubit readout. Overall, our results open up the possibility to operate compact transistor technology as electron spin qubits and demonstrate the potential of split-gate FD-SOI technology as a hardware for compact and scalable hybrid quantum computing architectures. Acknowledgments This research is supported by the European Community’s Seventh Framework Programme (FP7/2007-2013) through Grant Agreement No. 318397 (http://www.tolop.eu) and Horizon 2020 through Grant Agreement No. 688539 (http://mos-quito.eu). M. F. Gonzalez-Zalba is supported by a Research Fellowship at Hughes Hall College, University of Cambridge. References [1] P.W. Shor, SIAM Journal on Computing 26 (1997) 1484. [2] L. K. Grover, Phys. Rev. Lett 79 (1997) 325. [3] D. Poulin, M. B. Hastings, D. Wecker, N. Wiebe, A .C. Doherty, M. Troyer, Quantum Inf. & Comput. 15 (2015) 361. [4] M. Veldhorst, C. H. Yang, J. C. Hwang, W. Huang, J. P Dehollain, J. T. Muhonen, A.S. Dzurak, Nature, 526 (2015), 410. [5] A. C. Betz, S. Barraud, Q. Wilmart, B. Placais, X. Jehl, M. Sanquer, and M. F. Gonzalez-Zalba, App. Phys. Lett. 104 (2014) 043106. [6] A. C. Betz, R. Wacquez, M. Vinet, X. Jehl, A. L. Saraiva, M. Sanquer, A. J. Ferguson, M. F. Gonzalez-Zalba M. F., Nano Lett. 15 (2015) 4622. [7] M. F. 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