16-17 septiembre 2025
Universe
Europe/Madrid timezone

Porting MADGRAPH to FPGA Using High-Level Synthesis (HLS)

16 sept. 2025 11:25
15m
Universe

Universe

Salón de Actos PCUV (Edificio de Cabecera)
Electrónica Electrónica

Ponente

Hector Gutierrez ((Instituto de Física Corpuscular (Universitat de València)))

Descripción

The escalating demand for data processing in particle physics research has spurred the exploration of novel technologies to enhance the efficiency and speed of calculations. This study presents the development of an implementation of MADGRAPH, a widely used tool in particle collision simulations, to FPGA using High-Level Synthesis. This research presents a proof of concept limited to a single, relatively simple process (e+ e- > mu+ mu-). The experimental evaluation methodology is described, focusing on performance comparison between traditional CPU implementations, GPU acceleration, and the new FPGA approach. This study describes the complex process of adapting MADGRAPH to FPGA using HLS, focusing on optimizing algorithms for parallel processing. These advancements could enable faster execution of complex simulations, highlighting FPGA's crucial role in advancing particle physics research. The encouraging results obtained in this proof of concept prove potential interest in testing the performance of the FPGA implementation of more complex processes.

Autor primario

Hector Gutierrez ((Instituto de Física Corpuscular (Universitat de València)))

Coautores

Alberto Valero (IFIC- Universidad de Valencia) Luca Fiorini (IFIC / U. Valencia) Francisco Hervás Álvarez (Instituto de Física Corpuscular (Universitat de València)) Arantza Oyanguren (IFIC- Valencia)

Materiales de la presentación

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