Ponente
Descripción
Reliably executing quantum algorithms on noisy intermediate-scale quantum (NISQ) devices is
challenging, as they are severely constrained and prone to errors. Efficient quantum circuit
compilation techniques are therefore crucial for overcoming their limitations and dealing with
their high error rates. These techniques consider the quantum hardware restrictions, such as the
limited qubit connectivity, and perform some transformations to the original circuit so that it can
be executed on a given quantum processor. Certain compilation methods use error information
based on calibration data to further improve the success probability or the fidelity of the circuit to
be run. However, it is uncertain to what extent incorporating calibration information in the
compilation process can enhance the circuit performance. For instance, considering the most
recent error data provided by vendors after calibrating the processor might not be functional
enough as quantum systems are subject to drift, making the latest calibration data obsolete within
minutes.
In this talk, we will discuss how different usage of calibration data impacts the circuit fidelity, by
using several compilation techniques and quantum processors (IBM Perth and Brisbane). To this
aim, we will present a framework that incorporates some of the state-of-the-art noise-aware and
non-noise-aware compilation techniques and allows the user to perform fair comparisons under
similar processor conditions. Our experiments yield valuable insights into the effects of noise-
aware methodologies and the employment of calibration data. The main finding is that pre-
processing historical calibration data can improve fidelity when real-time calibration data is not
available due to factors such as cloud service latency and waiting queues between compilation
and execution on the quantum backend.
