8-10 mayo 2024
Colegio Mayor Rector Peset
Europe/Madrid timezone

Enhancing Data Processing in the CMS Trigger System for HL-LHC with HLS

9 may. 2024 9:45
15m
Salón de Actos (Colegio Mayor Rector Peset)

Salón de Actos

Colegio Mayor Rector Peset

Plaza Horno de San Nicolás, 4. 46001- Valencia
Electronics (ASIC, DAQ, Trigger, powering) Electronics (ASIC, DAQ, Trigger, powering) WG

Ponente

Pelayo Leguina (University of Oviedo)

Descripción

Abstract: Enhancing Data Processing in the CMS Trigger System for HL-LHC with HLS

In the context of the HL-LHC upgrades at the CMS experiment, handling the immense data volume efficiently is pivotal. This paper discusses the integration of High-Level Synthesis (HLS) for hardware acceleration, a key innovation in processing High Energy Physics (HEP) data. HLS effectively bridges the complex software algorithms and hardware deployment, particularly on FPGA platforms, facilitating swift and precise real-time data processing. Focusing on a specialized track-finding algorithm for muon reconstruction, this study showcases the conversion of software routines into robust, high-performance hardware solutions using HLS. This conversion enhances the precision and throughput of muon detection at CMS. Additionally, we introduce a custom project build system developed using CMake and TCL scripting. This system streamlines the compilation and deployment process, enabling modular, scalable, and reproducible builds. Key HLS strategies such as parallel processing, pipelining, and optimized memory usage are explored, highlighting their roles in the effective acceleration of algorithms. The synergy between advanced HLS techniques and a tailored build system significantly boosts the development and performance of hardware-accelerated solutions in particle physics research.

Autor primario

Pelayo Leguina (University of Oviedo)

Coautor

Santiago Folgueras (Universidad de Oviedo)

Materiales de la presentación

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