Ponentes
Descripción
Improving timing resolution will be an important challenge for the next generation of particle physics detectors. One of the intrinsic aspects to achieve when using TDCs (Time to Digital Converters) is the quality and the low jitter of the clock. Thus, clock distribution becomes critical to ensure an optimal time measurement and this is usually done through a chain of FPGAs connected via optical serial links up to the highest accceptable radiation region in the experiment. Many detector components of planned e+e- colliders experiments share with LHC Muon detectors relatively low radiation scenarios and thus can enjoy the versatility of using newly available radiation tolerant FPGAs instead of ASICs for on detector electronics. CIEMAT is participating in DRD7.3 subgroup (timing) studying the timing performance, both in terms of precision and of phase-determinism of intrinsically rad-hard Microsemi FPGAs. Early studies and plans will be presented.
