Speaker
Dr.
Fco.Rogelio Palomo Pinto
(Escuela Superior de Ingenieros Universidad de Sevilla)
Description
CMOS microelectronics is vulnerable to Single Event Effects, SEE. Essentially, a SEE is an undesirable particle detection due to parasitic solid state detectors inherent to CMOS structures. Macroscopically, the detection event shows as a device malfunction. For several years we have been doing SEE experiments at CNA, demonstrating the feasibility of that facility. CNA has "low" energy particle accelerators, out of SEE standards. However, CMOS miniaturization trend increases SEE vulnerability so nowadays the CNA facility can make full SEE studies for nanometric (130 nm and smaller) VLSI technological processes.
The results of our work are now used by companies like Alter Technologies or institutions like INTA or ESA. As spin off of the experimental research we have developed a new SEE electric emulators, FTUNSHADES 2, under ESA contract. FTUNSHADES has dual capabilities: it can localize SEE vulnerabilities in FPGA-emulated CMOS digital designs by electrical fault injection and can works, in the lab, as SEE monitor (i.e., "parasitic" detectors read out electronics). For analog electronics, and also under ESA contract, we are now developing new AHDL simulation techniques to assess fault injection, in order to predict experimental results.
Oral or poster presentation | ORAL |
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Primary author
Dr.
Fco.Rogelio Palomo Pinto
(Escuela Superior de Ingenieros Universidad de Sevilla)