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SUMMARY:Developments for the TileCal readout electronics system
DTSTART;VALUE=DATE-TIME:20200312T140000Z
DTEND;VALUE=DATE-TIME:20200312T141000Z
DTSTAMP;VALUE=DATE-TIME:20260419T003344Z
UID:indico-contribution-12373@indico.ific.uv.es
DESCRIPTION:Speakers: Alberto Valero ()\nTileCal is the central hadronic c
 alorimeter of the ATLAS experiment at the Large Hadron Collider (LHC) at C
 ERN.\nIt is a sampling detector made of iron as absorber and scintillator 
 as active material.\nThe light produced by charged particles crossing the 
 scintillator tiles is collected by wavelength shifting fibers attached to 
 the edge of the tiles and routed to photomultiplier tubes (PMTs).The PMT s
 ignals are digitized synchronously with the LHC clock and the samples are 
 stored in pipeline buffers in the front-end electronics. The data for even
 ts selected by the Level 1 trigger system are transmitted to the ReadOut D
 rivers (RODs) located in the back-end system at a maximum sustained rate o
 f 100 kHz.\nThe ROD is the core element of the back-end electronics and it
  represents the interface between the front-end electronics and the ATLAS 
 overall Data AcQuisition (DAQ) system. It is responsible of energy and tim
 e reconstruction\, trigger and data synchronization\, busy handling\, data
  integrity checking and lossless data compression. The TileCal ROD is a st
 andard 9U VME board equipped with DSP based Processing Units mezzanine car
 ds. A total of 32 ROD modules are required to read-out the entire TileCal 
 detector. Each ROD module has to process the data from up to 360 PMTs  in 
 real time in less than 10μs. Our group was responsible of the design\, pr
 oduction\, installation and now the maintenance of the ROD system includin
 g the control software and firmware of the DSPs.\nIn parallel\, we are wor
 king on the development of the new TileCal readout system for the HL-LHC. 
 The readout architecture will radically change and the photomultiplier sig
 nals will be digitized and transferred to the TileCal PreProcessors (TileP
 Pr) located off-detector for every bunch crossing\, requiring a data bandw
 idth of 40 Tbps. The TilePPr will be the interface between the on-detector
  electronics and the overall ATLAS trigger and data acquisition systems. O
 ur group is responsible of the design\, production and installation of the
  TilePPr system. The TilePPr is a modular ATCA system composed of a custom
  ATCA Carrier board equipped with several mezzanine cards.\nThis contribut
 ion will briefly introduce the current TileCal readout system and the upgr
 ade for the HL-LHC. It will also include a description of the reconstructi
 on firmware used in the ROD system and the design details and control soft
 ware of the ATCA Carrier board for the TilePPr module.\n\nhttps://indico.i
 fic.uv.es/event/4029/contributions/12373/
LOCATION:Universe
URL:https://indico.ific.uv.es/event/4029/contributions/12373/
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